MFENX LIGHTS OUT / PROPRIETARY COMPUTE SYSTEM
Lights Out combines two execution engines under one local system: QQfenx discovers the smallest exact quotient ring required by each wrapping-i32 tensor tile, while the native C11 scientific engine drives IEEE FP64 provider workloads across CPU workers and process grids. Upstream NPB qualifies the surrounding OpenMP and MPI system with benchmark-native verification.
QQFENX / ADAPTIVE EXECUTION
A tile is stored as a normalized payload and its shared power-of-two content exponent:
T = 2s · T̂ (mod 232)
For a contribution A × B, QQfenx derives q = 32 − sA − sB. The payload executes in ℤ/2qℤ while reconstruction preserves the original 32-bit answer exactly.
Wrapping-i32 remains the result contract.
The runtime selects the exact physical kernel class.
New trailing-zero content shrinks the next quotient.
Proven-zero downstream contributions are annihilated.
physical quotient width, ending in exact annihilation
logical MACs execute through Q8
one additional exact content bit is discovered
Zero payload MACs execute; all eight logical MACs are annihilated
payload MACs execute; the exact output is independently accepted
Self-contained C11 kernels implement Q8, Q16, Q24, and Q32 arithmetic. Runtime dispatch selects AVX2, SSE4.1, or scalar execution according to the host while preserving identical results.
When no quotient contraction exists, q = 32 and QQfenx runs the full-ring path. Structure changes physical work, never numerical meaning.
The standalone full-ring replay verifier re-derives tile content, quotient decisions, operation accounting, authenticated outputs, and the complete wrapping-i32 result before acceptance.
QQFENX / HISTORICAL SIGNED PERFORMANCE RELEASE v0.1.4
01e2c6e
Exact wrapping-u32 arithmetic. Each displayed range spans same-compiler end-to-end medians from 15 retained warm samples per compiler.
end-to-end versus same-compiler dense C
end-to-end versus same-compiler dense C
end-to-end versus same-compiler dense C
end-to-end versus same-compiler dense C
End-to-end warm scaling versus the matching one-lane QQfenx execution.
Every reported result was bit-identical to the independent exact wrapping-u32 oracle. The pinned UCI Iris workload also passed the independent exact oracle.
The signed, unfiltered evidence retains every configured comparator and result for source commit 01e2c6e.
NATIVE SCIENTIFIC COMPUTING
The forthcoming runtime extends the native scientific path with plan-driven complex transforms, exact live-region routing for strided matrices, and an inventory-bound contract for MPI launch placement. Each feature enters through checked C11 interfaces and the existing persistent execution context.
Dependency-free C11 plans own canonical bit-reversal and twiddle tables for batched, power-of-two forward and inverse transforms with padded strides and exact in-place operation.
1-D C2C · FORWARD + INVERSEReordering, butterfly stages, and inverse scaling use the existing bounded workers. Fast execution dispatches across scalar, SSE2, AVX, and AVX2 + FMA implementations.
SIMD DISPATCH · PADDED BATCHESThe reproducible policy uses a canonical floating-point environment and fixed non-contracting butterfly order across supported backends and lane counts.
BITWISE-STABLE RESULT ORDERAn allocation-free interval merge distinguishes genuine overlap from adjacent strided submatrices. HPL-shaped disjoint panels enter native DGEMM directly; true overlap retains snapshot-safe packing.
EXACT ALIAS CLASSIFICATIONNode inventories, rank capacity, threads per rank, launcher family, shared-filesystem root, and deterministic hostfile bytes are bound into one checked MPI placement record.
OPEN MPI · MPICH · RANK PARTICIPATIONThe Lights Out scientific path begins with self-contained C11 kernels, keeps a persistent multicore worker pool close to the data, and extends the same checked execution contract through CBLAS and MPI. Applications can enter through a checked C ABI or a safe Rust API while the runtime resolves the best supported CPU backend once per context.
Typed slices, immutable FFT-plan ownership, and exclusive Rust contexts meet validated C dimensions, strides, spans, aliases, CSR structure, and lifecycle state.
Ten double-precision CBLAS entry points connect unmodified HPL calls to the MFENX FP64 engine. Exact live-region classification keeps disjoint strided panels on zero-copy DGEMM paths.
Persistent workers execute complex FFT, streaming, reduction, dense, sparse, and stencil kernels with bounded operation-time storage.
Each rank drives its local worker pool while checked placement, communicator-wide agreement, partition checks, and collective execution coordinate the full job.
Matrices are distributed over an explicit P × Q process grid. Each SUMMA phase broadcasts an
A panel across a process row and a B panel down a process column, then sends the owned blocks directly
through native multicore DGEMM. Two bounded panel slots prepare the next phase while the current phase computes.
Cache-blocked FP64 DGEMM joins copy, scale, add, triad, AXPBY, and deterministic dot products with SIMD tails and padded leading dimensions.
CBLAS · HPL · STREAMAn owning CSR plan validates and packs matrix structure once, then reuses it across repeated local and rank-partitioned sparse operations.
HPCG · CSR ITERATIVE SOLVERSZero-Dirichlet local kernels combine with z-slab ownership and nonblocking halo exchange that overlaps interior computation.
STRUCTURED GRIDS · DOMAIN DECOMPOSITIONChunk-safe broadcast, native MPI sum, and ascending-rank reproducible sum provide communication paths for both throughput and stable result order.
OSU · MPI COMMUNICATIONEvery displayed value is bound to a source-locked build, retained raw output, captured topology, extracted metrics, and a rechecked evidence suite.
upstream benchmark-native verification passed
MFENX point result at identical single-host 2-rank × 1-thread topology. Raw total bandwidth: 27.0054 vs 22.2204 GB/s.
N=1024 · NB=64 · P=2 · Q=2 — both runs passed the official HPL residual check.
MB/s from the same-host point capture; exact four-thread MFENX telemetry covered 20 calls and 200,000,000 elements per kernel.
Two ranks, message sizes 8–1,024 bytes, 56 calls and 1,785 elements per rank; all-reduce exercised the in-place path on every call.
—The signed evidence bundle preserves the complete 46-record technical history behind the displayed results.
Every upstream suite is identified by official version, exact byte length, and SHA-256 before a build begins. Build inputs, executables, raw output, topology metadata, and extracted metrics remain connected in one verifiable record.
Source-locked build profiles connect HPL's CBLAS calls to the MFENX provider and retain every result row with its residual.
SHA-256 · 32c5c17d…2830
SPARSE SYSTEM PERFORMANCE
HPCG 3.1
Validity, runtime, memory, rating, and reported bandwidth fields are reconstructed from retained official benchmark output.
SHA-256 · 33a434e7…0f4a4
UPSTREAM SYSTEM QUALIFICATION
NPB 3.4.4
Upstream OpenMP and MPI builds cover CG, MG, FT, EP, IS, BT, SP, and LU, qualifying the surrounding system through benchmark-native verification.
SHA-256 · 1ae21939…3549
MEMORY BANDWIDTH
STREAM 5.10
Copy, Scale, Add, and Triad rates remain paired with average, minimum, and maximum timing from the official source.
SHA-256 · a52bae5e…1692b
MPI COMMUNICATION
OSU 7.5.2
Broadcast and all-reduce latency tables preserve their original column identities, units, lexical values, and parsed finite numbers.
SHA-256 · 618de3d0…bbbdc
Benchmark names identify their source projects and do not imply endorsement. This product includes software developed at the University of Tennessee, Knoxville, Innovative Computing Laboratory. complete benchmark attribution
01 / DEFINITION
The combined architecture includes an instruction set, compiler, parallel scheduler, bounded-memory storage path, recovery protocol, and verifier. It coordinates CPU lanes and authenticated local storage under one deterministic execution and verification contract. Together these components make Lights Out a local supercomputer implemented as one cohesive software system.
The compiled image binds each output piece to lane piece mod 2.
The acceptance harness observed both named lane tasks inside the product
process at the same instant while the fresh workload was running.
Tensor manifests name BLAKE3-addressed chunks. Lanes read bounded, authenticated ranges instead of loading the complete 224 MiB right tensor into managed memory. Resource certificate schema 5 records the bound.
The signed execution foundation records streamed i32 matrix multiplication with wrapping-i32 arithmetic, bounded managed memory, durable receipts, and exact replay as one verified path inside the current system.
02 / SAME WORKLOAD
This is a same-workload, cross-release, single-run comparison:
276.103268901 s ÷ 5.608764486 s. The displayed ratio is
49.2271104608×, rounded to 10 decimal places. The retained v1 and v2
technical records preserve the measurement method and matching result identities.
In v2, primary arithmetic no longer dominates the accepted internal timing. Durable output commit/finalization and exact replay are the larger remaining phases on this rotating local disk.
03 / RESOURCE MEASUREMENTS
04 / EXECUTION PATH
JavaScript on this page downloads, hashes, and cross-checks the selected release files. Runtime memory, timing, process interruption, lane overlap, and syscall observations come from the retained external harness records.
05 / AUTHENTICATED I/O
06 / RECOVERY
—
the output root also matches the preserved v1 comparator
07 / ADVERSARIAL INTEGRITY
08 / BROWSER CHECKS
The browser hashes the current scientific summary and selected retained execution files, then checks the exact workload, topology, result, and telemetry fields displayed above.
COMMERCIAL OPERATION
chmod +x ./mfenx-local ./mfenx-local matrix-create --store mfenx-store --rows 256 --columns 256 --fill sequence --output left.tensor.json --io-mib 1 ./mfenx-local matrix-create --store mfenx-store --rows 256 --columns 256 --fill identity --output right.tensor.json --io-mib 1 ./mfenx-local compile --store mfenx-store --left left.tensor.json --right right.tensor.json --output product.image.json --max-managed-mib 64 --lanes 2 --io-mib 1 ./mfenx-local run --store mfenx-store --image product.image.json --checkpoint-dir product.checkpoint --output product.result.json --io-mib 1 ./mfenx-local verify --store mfenx-store --image product.image.json --result product.result.json --io-mib 1